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IJAECS

Using IT for Advanced Environmental Monitoring and Management

International Journal of Advances in Engineering and Computer Science

E-ISSN: 3121-6382

An Internationally Renowned, Widely Indexed, Open Access Journal—Peer Reviewed and Published Quarterly—Dedicated to Advancing Global Scholarship Across Disciplines.

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IJAECS

ijaecs/2025/Exploring Bounded Rationality Through Computational Intelligence: A Comprehensive Review

International Journal of Advances in Engineering and Computer Science

An Open Access Peer Reviewed International Journal.
Publication Frequency:  Bimonthly
ISSN Online:                      XXXX-XXXX
Country of Origin:            Nigeria
Language:                         English
Publisher Name:              Academians Publishers

Exploring Bounded Rationality Through Computational Intelligence: A Comprehensive Review
Keywords:
Abstract

Bounded rationality departs from the traditional economic assumption of fully rational agents by highlighting the impact of cognitive and computational constraints on human decisions. This review synthesizes recent progress in computational intelligence that addresses how to model and enhance rationality within the bounds of these limitations. We discuss foundational theories, including Herbert Simon’s bounded rationality and Ariel Rubinstein’s algorithmic framework, alongside contemporary computational approaches involving heuristic search, machine learning, and multi-agent systems. Special attention is given to methods that bridge psychology, economics, and artificial intelligence, offering realistic models of decision-making and examining their consequences for economics, behavioral finance, and autonomous system design. The review concludes by identifying future research opportunities for creating more adaptable and robust agents capable of navigating complex environments under limited information and computational resources.

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IJAECS

ijaecs/2025/The Symbiotic Evolution of Intelligent Hardware and Data Processing for Next-Generation Immersive Realities

International Journal of Advances in Engineering and Computer Science

An Open Access Peer Reviewed International Journal.
Publication Frequency:  Bimonthly
ISSN Online:                      XXXX-XXXX
Country of Origin:            Nigeria
Language:                         English
Publisher Name:              Academians Publishers

The Symbiotic Evolution of Intelligent Hardware and Data Processing for Next-Generation Immersive Realities
Keywords:

Extended Reality, Intelligent Hardware, Data Pipeline, Immersive Computing, Edge AI, Neuromorphic Processing, Multimodal Data, Latency, Privacy, Brain-Computer Interface

Abstract

The drive for genuine immersion is propelling Extended Reality (XR)—covering Virtual, Augmented, and Mixed Reality—past the constraints of conventional computing. This progress is powered by a surge in multimodal data (spatial, biometric, and behavioral) and made possible by a new generation of intelligent, purpose-built hardware. This paper thoroughly explores how data and smart hardware co-evolve to shape future immersive environments. It breaks down the entire data workflow, from capturing multiple data types and processing them at the edge, to AI-powered rendering and secure data storage. The discussion highlights how custom chips, neuromorphic processors, and advanced sensors are tackling challenges of latency, bandwidth, and computation. The paper also investigates the importance of edge and fog computing for enabling real-time responsiveness and personalization. In addition to technical aspects, it examines critical ethical, security, and privacy issues that arise from handling sensitive biometric and behavioral information. The concluding section looks ahead to developments like brain-computer interfaces, real-time photorealistic rendering, and AI-generated content, and sets out a research agenda for developing immersive experiences that are scalable, ethical, and transformative.

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IJAECS

ijaecs/2025/ADVANCING ENTERPRISE AGILITY: A CONTEMPORARY EXAMINATION OF SERVERLESS ARCHITECTURES FOR SCALABLE CLOUD-NATIVE APPLICATIONS

International Journal of Advances in Engineering and Computer Science

An Open Access Peer Reviewed International Journal.
Publication Frequency:  Bimonthly
ISSN Online:                      XXXX-XXXX
Country of Origin:            Nigeria
Language:                         English
Publisher Name:              Academians Publishers

ADVANCING ENTERPRISE AGILITY: A CONTEMPORARY EXAMINATION OF SERVERLESS ARCHITECTURES FOR SCALABLE CLOUD-NATIVE APPLICATIONS
Keywords:

serverless computing, FaaS, cloud-native, scalability, event-driven architecture, microservices, DevOps, cost optimization, vendor lock-in, cloud security

Abstract

Cloud computing has evolved continuously, with serverless architectures representing a pivotal innovation that decouples application logic from infrastructure management. This paper provides a comprehensive analysis of modern serverless computing, identifying it as a critical enabler for highly scalable, cost-efficient, and agile enterprise applications. Beyond foundational concepts, the analysis examines the composition of Function-as-a-Service (FaaS) and Backend-as-a-Service (BaaS) models within contemporary cloud ecosystems. The research investigates architectural features that enable automatic elasticity, event-driven processing, and a shift in DevOps practices, reducing operational overhead. By evaluating diverse use cases, including real-time data analytics, microservices, and Internet of Things (IoT) deployments, the paper demonstrates the business value of serverless adoption. Additionally, it addresses challenges such as cold start latency, vendor lock-in, and security complexities in distributed environments, and proposes mitigation strategies and best practices. The study concludes by forecasting future developments, including the convergence of serverless computing with edge computing, artificial intelligence (AI), and multi-cloud orchestration frameworks, and provides a roadmap for enterprises undergoing digital transformation.

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IJAECS

ijaecs/2025/FlowMesh: A Dynamic Service Mesh for Orchestrating Serverless Workflows Across Heterogeneous Edge-Cloud Continuums

International Journal of Advances in Engineering and Computer Science

An Open Access Peer Reviewed International Journal.
Publication Frequency:  Bimonthly
ISSN Online:                      XXXX-XXXX
Country of Origin:            Nigeria
Language:                         English
Publisher Name:              Academians Publishers

FlowMesh: A Dynamic Service Mesh for Orchestrating Serverless Workflows Across Heterogeneous Edge-Cloud Continuums
Keywords:

Serverless Computing, Edge-Cloud Continuum, Service Mesh, Workflow Orchestration, Fault Tolerance, Distributed Systems, Function-as-a-Service (FaaS)

Abstract

The integration of serverless computing with edge environments introduces a paradigm of highly distributed, low-latency processing. However, orchestrating complex serverless workflows across a heterogeneous continuum of resource-constrained edge devices and powerful cloud nodes presents significant challenges in latency, state synchronization, and fault tolerance. Existing orchestration systems, often designed for homogeneous cloud environments, struggle with the inherent network instability and resource asymmetry of edge-cloud topologies. This paper presents FlowMesh, a dynamic service mesh architecture specifically designed for decentralized serverless workflow orchestration. FlowMesh introduces a novel, lightweight control plane that embeds orchestration logic directly within a mesh of sidecar proxies co-located with function runtime environments. This design enables intelligent, context-aware routing and state management without a centralized bottleneck. Key innovations include a distributed consensus protocol for fault-tolerant state management, a latency-aware function placement scheduler, and a transparent checkpointing mechanism for seamless fault recovery across stateful workflows. We evaluate FlowMesh against state-of-the-art systems, such as FaaSFlow and AWS Step Functions, in a simulated edge-cloud testbed. Results demonstrate that FlowMesh reduces end-to-end workflow latency by up to 40% in edge scenarios and improves fault recovery success rate by 65% compared to cloud-centric alternatives, while maintaining minimal overhead. This work provides a blueprint for building robust, high-performance serverless platforms that truly span the edge-to-cloud continuum.

Categories
IJAECS

ijaecs/2025/PQC-IMC: A Memristor-based In-Memory Computing Architecture for Accelerating Post-Quantum Cryptography Lattice-Based Operations

International Journal of Advances in Engineering and Computer Science

An Open Access Peer Reviewed International Journal.
Publication Frequency:  Bimonthly
ISSN Online:                      XXXX-XXXX
Country of Origin:            Nigeria
Language:                         English
Publisher Name:              Academians Publishers

PQC-IMC: A Memristor-based In-Memory Computing Architecture for Accelerating Post-Quantum Cryptography Lattice-Based Operations
Keywords:

Post-Quantum Cryptography, Lattice-Based Cryptography, In-Memory Computing, Memristor, Hardware Acceleration, Number Theoretic Transform, Internet of Things, Edge Security

Abstract

 The rapid rise of quantum computing threatens to undermine existing public-key cryptographic methods, driving an urgent push for Post-Quantum Cryptography (PQC) solutions. Lattice-based cryptographic protocols, including Kyber for key encapsulation and Dilithium for digital signatures, have emerged as top contenders due to their robust security. Yet, deploying these schemes in low-power IoT and edge platforms remains challenging, largely because polynomial multiplication—central to their operations—demands substantial computational resources. Standard von Neumann computer systems struggle with these tasks due to inefficiencies in shuttling data between memory and processor. This study presents PQC-IMC: a new in-memory computing (IMC) framework built on memristor (MR) crossbar arrays to accelerate the most intensive arithmetic steps in lattice-based PQC. We introduce a memristor-centric processing unit that executes Number Theoretic Transform (NTT) and point-wise multiplication directly where data is stored. Harnessing the parallelism and analog strengths of MR crossbars, PQC-IMC minimizes data transfer bottlenecks. Our comprehensive hardware blueprint features a coefficient mapping scheme for the crossbar and a digital circuit for managing operations and modular arithmetic. The system’s polynomial multiplication core was prototyped on a Xilinx Artix-7 FPGA using an MR emulator. Evaluation results show that PQC-IMC delivers a 4.1-fold speed increase and cuts energy use by 68% per polynomial multiplication compared to an optimized ARM Cortex-M4 software approach. Additionally, it achieves an 83% lower energy-delay product (EDP) than a leading ASIC accelerator. These outcomes highlight IMC’s potential for enabling secure, quantum-resistant cryptography in next-generation, energy-conscious edge devices.